Closing the Performance Gap between DRAM and PM for In-Memory Index Structures

Published as Storage Systems Research Center Technical Report UCSC-SSRC-20-01.


Emerging byte-addressable persistent memories such as Intel’s 3D XPoint enable new opportunities and challenges for in-memory indexing structures. While prior work has covered various aspects of persistent indexing structures, it has also been limited to performance studies using simulated memories ignoring the intricate details of persistent memory devices. Our work presents one of the first, in-depth performance studies on the interplay of real persistent memory hardware and indexing data structures. We conduct comprehensive evaluations of six variants of B+Trees leveraging diverse workloads and configurations. We obtain important findings via thorough investigation of the experimental results and detailed micro-architectural profiling. Based on our findings, we propose two novel techniques for improving the indexing data structure performance on persistent memories. Group flushing inserts timely flush operations improving the insertion performance of conventional B+-Trees by up to 24% while Persistency Optimized Log-structuring revisits log-structuring for persistent memories improving the performance of B+-Trees by up to 41%

Publication date:
May 2020

Yuanjiang Ni
Shuo Chen
Qingda Lu
Heiner Litz
Pang Zhu
Ethan L. Miller
Jiesheng Wu

Storage Class Memories

Available media

Full paper text: PDF

Bibtex entry

  author       = {Yuanjiang Ni and Shuo Chen and Qingda Lu and Heiner Litz and Pang Zhu and Ethan L. Miller and Jiesheng Wu},
  title        = {Closing the Performance Gap between {DRAM} and {PM} for In-Memory Index Structures},
  institution  = {University of California, Santa Cruz},
  number       = {UCSC-SSRC-20-01},
  month        = may,
  year         = {2020},
Last modified 29 May 2020